1. Field of the Invention
The present invention is directed to a process which includes etching for the production of printed wiring or circuit boards in which sub-zones of the circuit or wiring pattern which are not to receive solder are provided with solder rejecting properties by means of passivation.
2. Prior Art
In previously used methods of soldering a printed circuit board, sub-zones of the wiring or circuit pattern, which are not to receive any solder, are covered with a solder stop lacquer. This is not only to save solder but also to prevent the danger of short-circuits due to the formation of solder bridges. The application of the solder stop lacquer in the form of a solder stop mask is normally carried out by a silk screen printing process, which, due to its poor resolution capacity, imposes a limit on a precisely fitting coordination between the printed image and the wiring structure or pattern. Therefore, the known methods of using solder stop lacquers are not suitable for circuit boards wih fine wiring structures or patterns.
The known processes have suggested providing the sub-zones of the wiring or circuit pattern, which sub-zones are not to receive any solder, with a solder rejecting property by passivation. To obtain this end, the wiring pattern is completely formed and then the entire board with the exception of those sub-zones of the wiring pattern or circuit pattern, which zones are not to receive any solder, is provided with a photo lacquer mask by a photo printing method. Subsequently, the sub-zones which are not covered by the photo lacquer are provided with a passivation layer. The high resolution capacity of the photo printing process facilitates an application of the passivation layer in precise locations. In a variant of this known process, the whole metal surface on the substrate is passivated and then those zones which are to form the solder rejecting regions of the wiring patterns after the etching step are covered wih a photo lacquer. The portions of the passivation layer, which are not covered with the photo lacquer, are then removed chemically and the wiring or circuit pattern is then produced in a known manner such as by masking and etching. However, since both cases require a special covering mask which is applied by a photo printing method, the application of the passivation layer is very expensive. In addition, the solderability of the solderable zones of the wiring or circuit pattern can be considerably impaired due to an oxide formation which, in particular, occurs when the circuit boards are subject to a long intermediate storage time. However, it is not possible to remove the oxide layers either chemically or mechanically as the solder rejecting passivation layer would also be removed or damaged as a consequence of the chemical or mechanical removal of the oxide layer.